Broadcom and Meta Drive the AI ASIC Revolution — Now Funding Academia Too

Broadcom (NASDAQ: AVGO) reported $8.4 billion in AI chip sales in Q1 FY2026, which is a 106% year-over-year rise. The company also said it expected Q2 sales to be $10.7 billion, revealed a $73 billion AI backlog, and laid out a plan to reach $100 billion in annual AI chip sales by 2027.

Broadcom and Meta announced that they would be working together for several years to co-develop Meta's MTIA (Meta Training and Inference Accelerator) chips until 2029. The first chips will be used in more than 1 gigawatt of systems, and they will handle 2-nanometer-class accelerators.

Together with Applied Materials, GlobalFoundries, and Synopsys, the two companies also launched a $125 million Semiconductor Hub at UCLA. The funding will be used over five years to speed up research into AI chips and the training of doctoral-level workers. The academic spending is not a way to show charity; it is building up talent infrastructure for an industry where a lack of engineers is limiting growth.

The ASIC Shift: From GPU-Dominated to Hybrid Markets

What Broadcom is reporting are numbers that show more than just one company's quarterly success. They show a big change in how hyperscalers are making AI hardware. GPU-based systems are losing ground to custom ASICs (application-specific integrated circuits) that are designed to handle specific AI tasks. These ASICs are being used more and more in AI servers.

Tom's Hardware says that ASIC-based AI server sales will make up 27.8% of the market in 2026, which is a big jump from previous years. Broadcom and Marvell together make up the concentrated co-design market for hyperscaler ASICs. Marvell predicts that AI ASICs will bring in up to $11 billion in 2026. For hyperscalers that want to move beyond retail silicon, these two companies are the best choices for chip design partners.

The business reasoning is easy to understand. Custom ASICs usually improve data movement, memory hierarchy, and high-speed I/O for certain inference tasks. This means that they have lower cost-per-query at production scale than GPU clusters that do the same job. Hyperscalers that handle billions of inference requests every day have a financial reason to invest in custom silicon that lowers the total cost of ownership, even if it takes longer to create and has high one-time engineering costs.

Meta's MTIA Programme: Four Generations in Two Years

The most publicised case of this change is the partnership between Meta and Broadcom MTIA. Meta wants to make and use four versions of MTIA chips in the next two years. The accelerator will mostly be used for inference and ranking tasks, which are the types of high-volume, steady-state production tasks where custom silicon economics are most appealing.

The signal at the commercial size is the 1 gigawatt initial deployment commitment. With that level of commitment, both sides are spreading out one-time engineering and packaging costs over a big enough deployment to make the full-stack investment worth it. This includes chip logic, advanced packaging, and Ethernet fabric integration. Broadcom's bigger role now includes system-level integration in addition to chip design. This is in line with the "system-level approach to accelerator deployment" instead of a narrow focus on devices alone.

The 2-nanometer process node is the foundry dimension. TSMC is still the best partner for making these advanced designs, and being able to tap 2nm capacity is a competitive differentiator that makes TSMC even more important as the industry grows.

The UCLA Hub: Talent Infrastructure for the Next Decade

The $125 million Semiconductor Hub at UCLA's Samueli School of Engineering focuses on a different problem: not computing power or chip design, but the lack of engineers who can keep up with the industry's current rate of progress.

Along with the five-year study commitment, the partnership includes one-year internships in the industry for doctoral students. This makes a direct link between academic research and industrial application, instead of the usual university-industry relationship. "Nobody, not even the industry, knows what the semiconductor industry is going to look like in 10 years," Alissa Park, Dean of UCLA, said as the governing question. Can we still ask the toughest, most hardest questions?"

The time is interesting. Meta is both one of the original partners of the UCLA hub and letting go of 8,000 employees, which is about 10% of its total staff. Cutting jobs for knowledge workers while funding the pipeline for skilled semiconductor engineers is a clear example of how the industry sees human capital being scarce and valuable in the next ten years.

What to Watch Next

The most important short-term financial signal is Broadcom's revenue cycle, especially whether the $10.7 billion guidance for Q2 comes true and whether the $100 billion target for 2027 is still a good idea. How TSMC divides up its 2nm and 3nm capacity will show if hyperscaler ASIC programs can grow at the speed that their buying promises suggest.

As for MTIA performance disclosures, the first real-world test to see if custom silicon economics are bringing the theoretical benefits at production scale will be Meta's release of data on inference throughput and cost-per-query compared to GPU baselines.

Broadcom's $73 billion AI backlog and 106% year-over-year sales growth are the clearest signs that the shift from GPU-dominated AI hardware to a hybrid ASIC-GPU market is not just an idea; it is already making a lot of money for the company. The $100 billion goal, the Meta MTIA relationship, and the UCLA academic hub all work together to make a bet on AI chip infrastructure that goes from basic research to chip design to production deployment. 

For investors, the most important question is whether Broadcom can keep its profit margins as the ASIC market gets more competitive and hyperscalers build up their own chip design skills, which will make them less reliant on outside partners.